Take a SIT!

 

SIT Frequency amplitude response (improved 2ЅК76): 

(a) circuit; 

(b) measured amplitude response from [31]; 

(c) simulated response using: 

CE1 =2.5 nF, RE1 = RD=8Ω, p=0.0694, q=3, rs=1.1Ω, n=4, is=10-6А. 

(V(33)≡vo – the solid line shows the amplitude response while the dashed line shows the phase response) 

The output voltage (vo) waveform 

– the magnitude of the input sinewave voltage is chosen so that the delivered power to the 8Ω load is 1.5W. 

The SIT model parameters are (100 V SIT): 

p=0.0714, q=100, rs=8Ω, n=6, is=10e-6А 

(the signal frequency is fi = 10kHz, while RD=8Ω, C1 = 10μF, C2 = 100μF)

1000 V SIT (Tokin Corp.) IDS-VDS characteristics:
a) measured characteristics;
b) simulated characteristics using model from Fig. 4 with p=0.0714, q=100, rs=8Ω, n=6, is=10e-6А


(VDS is on the horisontal axis;
ID is on the vertical axis;
VGS was changed from 0 to -25 V in steps of -5 V.)

40 V SIT (2ЅК76) IDS-VDS characteristics: 

а) measured characteristics; 

b) simulated characteristics using model from Fig. 4 with 

p=0.0694, q=3, rs=1.1Ω, n=4, is=10^e-6А 

(VDS is on the horisontal axis; ID is on the vertical axis; VGS was changed from 0 to -12 V in steps of -1 V.)

//Models of SIT//

.param  p=p q=q rs=rs n=n is=is re1=re1 ce1=ce1 

.subckt sit     3     2    1

*-------------- D    G    S

er  3 5 value = {v(4,1)*v(5,4)}

d1 5 4 d1 

.model d1 d(rs= rs is= is n= n)

e2 1 4 9 1 1 

rds 3 1 24meg

dg 2 1 d2

.model d2 d(rs=.3 is=1e-6) 

e1 8 1 value = {((v(2,1)* p)*(( q −v(2,1)))}

re1 8 9 re1 ce1 9 1

се1

.ends

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The Spice model for the static induction transistor is presented. 

The model is based on the device behaviour rather than on the physical structure of the SIT. 

Simple method for model parameters extraction from the measured characteristics of the real SIT has been developed. Extensive simulations have been performed to examine the model characteristics. 

The model has passed all performed tests and the results correspond very well with the experimental ones given in doc. 

Although the proposed model is not an ideal solution it will help to start simulating various circuits containing static induction transistors. 

The first problem to solve is the discrepancy between the measured and simulated curves for Vgs = 0, when simulating the high voltage devices, where the value of the internal diode resistance rs is relatively high. 

One possible solution is to add a small DC bias at the gate input of the model. This problem will be investigated in details in developing an advanced SIT model.  

At least two other things are to be done in the near future: 

(1) to develop an algorithm for self extracting model parameters from devices data sheets; 

(2) to extend the model to covering both mode of SIT operation (triode and pentode-like) in order to enable full implementation of SIT for the Spice simulation program, or even to other circuit simulation program packages.